Course curriculum

  • 1

    VLSI_E-Learning Content

    • Chapter 1 - Introduction to VLSI

    • Introduction to VLSI PDF

    • Chapter 2 - Evolution of VLSI

    • Chapter 3 - VLSI Design Flow - 1

    • VLSI Design Flow - 2

    • Chapter 4 - Introduction to Digital World

    • Digital System

    • Number Systems

    • Decimal Number System

    • Binary Number System

    • Octal and Hexadecimal Number System

    • Number System Table

    • Number Base Conversions

    • Exercise

    • Binary Addition & Subtraction

    • Complements

    • Number System Further Reading

    • Chapter 5 - Introduction to Logic Design

    • Boolean Algebra

    • Basic Logic Gates

    • XOR Gate

    • Introduction of Error Detection & Correction

    • Hamming Distance

    • Parity Code

    • Hamming Code

    • NAND, NOR & XNOR Gates

    • DeMorgan's Theorems

    • Universal Gates

    • Exercise

    • Chapter 5 - Introduction to Combinational Circuits

    • Adders

    • Subtractors

    • Multiplexers

    • DeMultiplexers

    • Decoders

    • Encoders

    • Comparators

    • Further Reading

    • Introduction to Sequential Circuits

    • Latches

    • Flip Flops

    • Shift Registers

    • Application of Shift Register

    • Counters

    • Finite State Machines

    • Switch Debounce

    • Timing Analysis

    • Chapter 6 - Semiconductors - 1

    • Semiconductors - 2

    • Chapter 7 - FPGAs - 1

    • FPGAs Part - 2

    • Chapter - 8 Digital Design using Verilog HDL - Basic Introdcution to HDL

    • Basic Concepts - Lexical Conventions

    • Basic Concepts - Data Types

    • Basic Concepts - System Tasks and Compiler Directives

    • Modules and Ports

    • Gate-Level Modeling

    • Dataflow Modeling

    • Behavioural Modeling - 1

    • Behavioural Modeling - 2

    • Behavioural Modeling - 3

    • Digital Circuits in Verilog Design and Conclusion
  • 2

    Hardware & Software Info used for Projects

    • Introduction to Software & Hardware used in projects
  • 3

    VLSI - Basic circuits written in Verilog HDL, simulated and implemented on the FPGA from Apsis Solutions_Project - 1

    • Part 1 - NOT GATE

    • Part 2 - All Basic Gates
  • 4

    VLSI - UART communication to print a single character from Apsis Solutions_Project - 2

    • Part 1 - Coding

    • Part 2 - Implementation
  • 5

    VLSI - FSM Designs : Mealy & Moore Machines and Up Down Counter from Apsis Solutions_Project - 3

    • Part 1 - Mealy and Moore Designs

    • Part 2 - Up Down Counter
  • 6

    Recordings of Project Live Classes

    • Execution of Project 1 - Basic Circuits written in Verilog HDL implemeted on the FPGA

    • Execution of Project 2 - UART Communication to print a Single Character

    • Execution of Project 3 - FSM Designs : Mealy & Moore Machines and Up Down Counter
  • 7

    Project Submissions

    • Instructions for Submissions
  • 8

    Internship Project 1 - 16-Bit_RISC_Processor from Apsis Solutions

    • Part - 1

    • Part - 2

    • Part - 3

    • Part - 4

    • Part - 5

    • 16-Bit_Processor PDF
  • 9

    Internship Project 2 - Digital Design Project from Apsis Solutions

    • Part - 1

    • Part - 2

    • Part - 3

    • Part - 4
  • 10

    Recordings of Internship Project Live Classes

    • Execution of Internship Project 1 - 16-Bit_RISC_Processor

    • Execution of Internship Project 2 - Digital Design
  • 11

    Internship Project Submissions

    • Instructions for Submissions